D E M O 9 R S 0 8 L A 8
U S E R G U I D E
J A N U A R Y
2 3 ,
2 0 0 8
Figure 2: JP401 Option Header
?
?
?
?
?
?
?
?
DATA1
DATA2
RXD
TXD
Timer channel 0 input to Signal Analyzer
Timer channel 1 input to Signal Analyzer
SCI RXD input to Virtual COM Port
SCI TXD input to Virtual COM Port
BDM_PORT Header
A compatible HCS12 BDM cable can also attach to the 6-pin BDM interface header
(BDM_PORT). This header is not installed in default configuration. The figure below shows
the pin-out for the DEBUG header. This information is included for completeness.
Figure 3: J301 Header
BKGD
1
3
5
2
4
6
GND
RESET*
VDD
See the MC9RSO8LA8 Data Sheet for complete
DEBUG documentation
NOTE: This header is not installed in default configuration.
NOTE: On Rev A prototypes, J301-4 has been disconnected. To use an external BDM cable,
install a 6-pin header at J310 then add a wire from J301-4 to C400 (+).
POWER
The DEMO9RSO8LA8 provides several methods to apply power to the board. An option
header allows selection between the various power inputs. For application development and
debug, the board may be powered from the USB BDM. The 2.0mm PWR connector supports
stand-alone operation and higher power requirements. Power may also be applied to
connector J1 or the board may be configured to supply power from connector J1 to external
circuitry.
CAUTION:
Damage to the board may result if voltage greater than +5.5V is applied to
the connector J1 input.
POWER SELECT
Power may be applied to the board through the integrated USB-Multilink BDM circuitry, a
2.0mm barrel connector, or through connector J1.
Power selection is achieved using 2
selection headers: the V_SEL option header and the VX_EN option header.
8
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